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Description of Individual Course Units| Course Unit Code | Course Unit Title | Type of Course Unit | Year of Study | Semester | Number of ECTS Credits | | MEK20920158225 | DIGITAL ELECTRONICS | Compulsory | 2 | 3 | 2 |
| | Level of Course Unit | | Short Cycle | | Objectives of the Course | | • Designing various circuits by using Logic gates, flip-flops and integrated circuit components. | | Name of Lecturer(s) | | Öğr. Gör. Mustafa KARA | | Learning Outcomes | | 1 | Knows designing circuits using logical gates. | | 2 | encoder, decoder, 7 segment display and driver, PLA, PAL IC's. | | 3 | Knows difference between sequential and combinational circuits. |
| | Mode of Delivery | | Evening Education | | Prerequisites and co-requisities | | Yok | | Recommended Optional Programme Components | | Week 1 Logical operations and logic gates
Week 2 Logical functions and minterm, maxterm.
Week 3 Karnough diagrams.
Week 4 Resolving sample questions. Providing information about multiplexers and demultiplexers.
Week 5 Decoders.
Week 6 Introduction to sequential circuits. Comparing combinational and sequential logic circuits.
Week 7 SR, JK, T, D flip-flops.
Week 8 Exam.
Week 9 Resolving sample questions.
Week 10 Introduction to PLA, PAL, ROM, PROM, EPROM IC's
Week 11 Designing circuits by using PLA, PAL, ROM, PROM and EPROM.
Week 12 Exam
Week 13 State diagrams. Analyzing a sequential circuit and obtaining its state diagram.
Week 14 Resolving sample questions.
Week 15 Counters and counter ic's.
Week 16 Final exam.
| | Course Contents | | • Circuit Design by using Logic Gates Circuit Design by using Flip-Flops Circuit Design by Using Integrated Circuits | | Weekly Detailed Course Contents | |
| 1 | Logical operations and logic gates | | | | 2 | Logical functions and minterm, maxterm. | | | | 3 | Karnough diagrams | | | | 4 | Resolving sample questions. Providing information about multiplexers and demultiplexers. | | | | 5 | Decoders. | | | | 6 | Introduction to sequential circuits. Comparing combinational and sequential logic circuits. | | | | 7 | SR, JK, T, D flip-flops. | | | | 8 | midterm | | | | 9 | Resolving sample questions. | | | | 10 | Introduction to PLA, PAL, ROM, PROM, EPROM IC's | | | | 11 | Designing circuits by using PLA, PAL, ROM, PROM and EPROM. | | | | 12 | State diagrams. Analyzing a sequential circuit and obtaining its state diagram. | | | | 13 | State diagrams. Analyzing a sequential circuit and obtaining its state diagram. | | | | 14 | Resolving sample questions. | | | | 15 | Counters and counter ic's. | | | | 16 | Final exam. | | |
| | Recommended or Required Reading | | 1.MANO, M., 1994. Sayısal Tasarım, MEB Yay.
2.Floyd, T.L., 2006. Digital Fundamentals. Pearson Prentice Hall, Ninth Edition. | | Planned Learning Activities and Teaching Methods | | | Assessment Methods and Criteria | |
| SUM | 0 | |
| SUM | 0 | | Yarıyıl (Yıl) İçi Etkinlikleri | 40 | | Yarıyıl (Yıl) Sonu Etkinlikleri | 60 | | SUM | 100 |
| | Language of Instruction | | Turkish | | Work Placement(s) | | Yok |
| | Workload Calculation | |
| Midterm Examination | 1 | 1 | 1 | | Final Examination | 1 | 1 | 1 | | Quiz | 12 | 2 | 24 | | Attending Lectures | 14 | 2 | 28 | | Individual Study for Mid term Examination | 1 | 10 | 10 | | Individual Study for Final Examination | 1 | 10 | 10 | |
| Contribution of Learning Outcomes to Programme Outcomes | | LO1 | 3 | 3 | 3 | 3 | 4 | 5 | 3 | 4 | 3 | 5 | 5 | 3 | 5 | 4 | 3 | 3 | 3 | 3 | 3 | 2 | 4 | 5 | 3 | 3 | 3 | | LO2 | 3 | 2 | 3 | 2 | 4 | 3 | 3 | 3 | 3 | 2 | 2 | 4 | 3 | 2 | 4 | 5 | 4 | 4 | 4 | 1 | 2 | 3 | 2 | 1 | 4 | | LO3 | 4 | 2 | 2 | 3 | 4 | 2 | 3 | 1 | 3 | 3 | 2 | 2 | 1 | 2 | 2 | 1 | 3 | 2 | 1 | 4 | 3 | 2 | 3 | 2 | 5 |
| | * Contribution Level : 1 Very low 2 Low 3 Medium 4 High 5 Very High |
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